1. Field of the Invention
The present invention relates to a semiconductor device having a MOS transistor comprising a source region formed in a semiconductor substrate and constituted by an impurity of a first conductive type, a drain region formed in the semiconductor substrate and constituted by an impurity of the first conductive type, and a gate electrode formed through a gate insulating film on the semiconductor substrate between the source region and the drain region.
2. Description of the Invention
Examples of a semiconductor device having an MOS transistor include a solid-state image pick-up device. For example, in a CCD type solid-state image pick-up device, a MOS transistor is used for a peripheral circuit such as an amplifier for outputting a signal corresponding to an electric charge generated by a photoelectric converting device and transferred through an electric charge transfer device. In the semiconductor device having the MOS transistor, a gate of the MOS transistor is charged in a manufacturing process so that charge-up is generated and a gate insulating film of the MOS transistor is broken or deteriorated in some cases. For the solid-state image pick-up device, there is often used an ONO structure in which an oxide film, a nitride film and an oxide film are provided in order as the gate insulating film of the MOS transistor. With the structure, therefore, the charge-up can easily be carried out. In recent years, particularly, a gapless microlens and an in-layer lens are introduced so that it is impossible to disregard the influence of a plasma damage due to etch-back, and a threshold voltage of the MOS transistor is apt to fluctuate due to the charge-up.
Therefore, in the related art, a protecting diode has been provided in order to prevent a deterioration in a characteristic of the MOS transistor which is caused by an electric charge stored in a gate electrode by a manufacturing process.
FIG. 5 is a typical sectional view showing a semiconductor device having the related-art MOS transistor.
A p-type well layer 2 is formed on an n-type silicon 1, and a semiconductor substrate is constituted by the n-type silicon 1 and the p well layer 2. A source region 4 constituted by an n-type impurity of a first conductive type and a drain region 5 constituted by an n-type impurity are formed on a surface portion of the p well layer 2, and a gate electrode 6 constituted by a conductive material such as polysilicon is formed on the semiconductor substrate between the source region 4 and the drain region 5 through a gate insulating film 3 having an ONO structure. An enhancement type (E type) N channel MOS transistor is constituted by the source region 4, the drain region 5 and the gate electrode 6.
Moreover, a p-type impurity region 8 of a second conductive type opposite to the first conductive type which serves to fix an electric potential of the p well layer 2 and an n-type impurity region 7 for discharging the electric charge stored in the gate electrode 6 to the semiconductor substrate are formed in a surface portion of the p well layer 2.
A terminal 8t for applying a voltage is connected to the p-type impurity region 8. A terminal S is connected to the source region 4 and a terminal D is connected to the drain region 5. A terminal G for applying a voltage is connected to the gate electrode 6. The terminal G is connected to the n-type impurity region 7. Consequently, the gate electrode 6 and the n-type impurity region 7 are connected to each other.
According to the structure, a bulk diode constituted by the n-type impurity region 7 and the p well layer 2 functions as a protecting diode for protecting the gate electrode 6. For this reason, even if a negative electric charge is stored in the gate electrode 6 during the manufacturing process, it can be discharged to the semiconductor substrate and a deterioration in the characteristic of the N channel MOS transistor can be prevented. Also in the case in which a positive voltage is applied to the terminal G, moreover, the bulk diode is connected in a reverse direction. Therefore, it is possible to prevent a gate current from flowing to the semiconductor substrate. In FIG. 5, the semiconductor device having the N channel MOS transistor is taken as an example. In case of a semiconductor device having a P channel MOS transistor, however, all of the conductive types are set to be opposite conductive types in FIG. 5.
JP-A-2006-24601 can be taken as an example of a document related to a gate electrode protection of the MOS transistor.
In some cases, an electric charge to be stored in a gate electrode of an MOS transistor is positive or negative. With the structure shown in FIG. 5, therefore, the negative electric charge can be discharged to a semiconductor substrate. However, the positive electric charge cannot be fully discharged to the semiconductor substrate. Consequently, there is a possibility that charge-up might be caused.